Provides advanced interconnect modeling for constraint development and electrical analysis of multi-gigabit designs. Simulates high-speed signals, systems, and power delivery networks at the single- or multi-board level.
Integrated with Cadence® Allegro® PCB design, editing, and routing technologies, Allegro PCB SI provides advanced signal integrity (SI) analysis both pre- and post-layout. Operating early in the design cycle allows for “what-if” scenario exploration, sets more accurate design constraints, and reduces design iterations.

Allegro PCB SI reads and writes directly to the Allegro PCB Editor database for fast and accurate integration of results. It provides a SPICE-based simulator and an embedded field solver, and it supports behavioral modeling with a robust modeling language. Bus architecture can be explored pre-layout to compare alternatives, or post-layout for a comprehensive analysis of all associated signals. The Allegro PCB Power Delivery Network (PDN) Analysis Option provides modeling of all power distribution characteristics.