Making connections between pages

Unless “some action” is taken, signals will be isolated from Page to Page in a Schematic design and the netlister will process the Net Names in the netlist to ensure isolation. The “some action” for signals is to add an Off-Page Connector Symbol to connect Pages at the same level in the design, since the design may be hierarchical (to be covered later in the course). For Power Nets, Global Power Symbols are added.

A wire or bus connected to a Symbol will inherit the name of the Symbol.

Net naming

Net naming follows the following precedence:

Hierarchical Port

Overrides

Off-Page Connector

Overrides

Global Power Symbol

Overrides

Net Alias

Overrides

Unnamed Net (Wire)

Try to avoid ambiguity when naming Nets, for example by applying multiple Net Aliases since the resulting Net Name may not be what you intended and may, in some circumstances, cause Nets to be connected together.

Off-Page Connectors

The provided Off-Page Connector Symbols appear to have a “sense of direction” but they are merely used to change a signal on a page from “private” to “public” so that connections can be made to other pages in the same design level (Schematic folder).

Off-Page Connector Symbols may be added to Wires, or Buses (see next section), but a valid name for the Symbol must be used to ensure a connection. So a Symbol with a single Net name will not attach to a Bus and a Symbol with a Name using bus notation will not attach to a Wire.

Placing and Naming Buses

Buses are added with: Place>Bus from the Menu; “B” or “b” shortcut key; or by using the Place Bus icon from the Schematic toolbar.

Buses use “bus notation” to specify the range, and order, of the bus members. “Bus notation” uses  square brackets. “[” “]” to hold the range. The Range delimiter is one of: “-” (minus); “:” (colon); or “..” ( dot-dot), any of the range order delimiters may be used. The “range” is specified with a “start” and an “end” positive number and the range may be increasing, or decreasing. For example: DQ[0-7], DQ[0:7] and DQ[0..7] all specify a bus with 8 members, from DQ0 up to DQ7. Similarly, DQ[7-0], DQ[7:0] and DQ[7..0] all specify the same bus with members DQ7 to DQ0. This bus naming convention can be applied to Net Aliases, Off-Page Connectors Hierarchical Pins and Ports. Note that the order of the bus is critical only when used throughout a hierarchical design, covered later in the course.

Since Nets of the same Name on the same Page are automatically connected, “wiring into” buses is not strictly a requirement. To connect to a bus the special Bus Entry symbol needs to be used:

Place>Bus Entry from the menu; “E” or “e” shortcut key; or the Place Bus Entry icon from the schematic toolbar. (Use Rotate to change the orientation) Note that the Bus Entry crosses exactly one large grid.

Schematic Netgroups

Schematic Netgroups allow grouping of Wires and Buses together. Whilst the Netgroup creation permits Schematic Netgroups to be selected as Schematic Netgroup members, no hierarchy of Schematic Netgroups is supported in the OrCAD Capture tools. Schematic Netgroups can be useful for grouping DDR signals together, as an example, an Address Bus, a Data Bus and Control signals. Schematic Netgroups will be transferred to PCB Editor as a flattened bus, unless using the Capture Constraint Manager flow which will remove any Schematic Netgroups from the netlist. (But will allow Netgroups to be specified in the Capture Constraint Manager)

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