Session 5: Simulating a Text Netlist 17.4 (AD Basic)

April 6, 2020 admin

Whilst this might be rarely needed, some understanding of “what” the simulator input is can be useful in resolving simulation syntax and model issues with simulations.

 

When PSpice>Run is used, the circuit Schematic is converted into a text netlist that is then input to the simulator. The text netlist contains the model instances and connections together with simulation commands.

 

SPICE, Simulation Program with Integrated Circuit Emphasis, was originally written in FORTRAN and and the input to a FORTRAN machine was in the form of Hollerith, punched, cards, hence the reference to a SPICE “deck”, a number of cards, as the input netlist. Each card contains what is now represented by a line in the text netlist. Hollerith cards have a columnar format so that the column that a character appears in can be significant.

 

PSpice was based on a University of Berkeley version named 2G6 (SPICE2), which was translated from FORTRAN to C by MicroSim, so that it could be compiled and maintained for a Personal Computer. The University of Berkeley also created a SPICE version written in C, 3F5 (SPICE3) was the last, but this did not have all of the functionality of SPICE2.

 

SPICE Text Netlist Format

For a SPICE Text netlist file format, the first character on the line determines what the contents of the line are:

* the line is a comment

A-Z the line instantiates a Model, note that not all of the letters are used

. the line is a command

For details about the models, look at the Cadence Help document Browser, for PSpice, Reference Guides, PSpice Reference Guide and Analog, and Digital, devices. This provides details of the Letter for the Model, the Pin list for the Model and netlist examples for the Model instantiation.

Here is a sample netlist:

* Sample Netlist

R1 IN OUT 1k

C1 OUT 0 1n

D1 0 OUT D1N746

V1 IN 0 DC 10 AC 1

.AC DEC 11 100 10k

.LIB

.PROBE

.END

The first line is the title, then a 1k resistor between nodes IN and OUT, then a 1n capacitor between nodes OUT and 0, then a D1N746 diode between nodes 0 (anode) and OUT (cathode), then a voltage source with a 10V DC value and a 1V AC value between nodes 0 (-ve) and IN (+ve), then a command to run an AC Sweep simulation 11 points per decade starting at 100Hz and ending at 10kHz, then a command to use the default libraries, then a command to open the Probe window, then a command to specify the end of the netlist.

 

Title and Comments in Models and netlists

An asterisk * at the start of the line means that the line is a comment

A semi-colon anywhere on a line means that the rest of the line is a comment

 

Models and Sub-circuits

Models begin with .MODEL and the model parameters are enclosed between brackets

Sub-circuits are netlists that describe the functionality of a model implemented with fundamental PSpice components and Models. A Sub-circuit starts with a .SUBCKT command and ends with a .ENDS command.

 

Some differences between SPICE2 and SPICE3

In SPICE2, the * means a comment in the first character position on the lines and always means multiply in any other character position. In SPICE3, the significance of the * is determined by the context, in the first character position it will always mean a comment follows but, in other character positions it may mean multiply, or a comment follows.

 

In PSpice, the B intrinsic device is a GaAsFET and the Z intrinsic device is an IGBT. In SPICE3, the B intrinsic device is an arbitrary Voltage, or Current, Source, needs conversion to EVALUE or GVALUE in PSpice, and the Z intrinsic device is a GaAsFET (GaAsFets are quite rare and IGBTs are always modelled as sub-circuits so users rarely encounter this as an issue when using IGBTs).

 

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