New features of OrCAD since V10.0 release...

OrCAD Capture - 17.2-2016

Please view the matrix to see which level the features appear in

  • Design Difference Viewer: New feature to perform logical and graphical comparisons between two designs, two schematic folders or two schematic pages and view the difference report in the form of a portable HTML format. (Watch Demo Video)
  • Advanced Annotation: The new advanced annotation feature lets users annotate multiple schematic pages at a time giving them complete control over their component annotation process in the design cycle. (Watch Demo Video)
  • Open Demo Design: The new Open Demo Design browser gives access to more than 150 demo designs made available from different locations, collated together to help users better understand Capture, Capture CIS and Capture _ PSpice Flow.
  • Export - Import XML: OrCAD Capture provides you the capability to convert Capture designs to XML format and vise-versa based on the requirement.
  • ISCF Export : Introducing direct ISCF (Intel Schematic Connectivity Format) feature for automating Intel-based design reviews to export hierarchical schematic designs in an Intel-approved format helping users optimize the design review process.
  • PDF Export: The new PDF export functionality lets users export Capture design as PDF file and provides intelligent design information.
  • Extended Preferences setup: The extended Preferences Setup window allows you to modify additional application settings in OrCAD Catpure like Command Shell, design and libraries, design rule check, CIS, NetGroup, NetList and Schematic.

OrCAD PCB Designer - 17.2-2016

Please view the matrix to see which level the features appear in

      - Stack up by zone: The new feature improves MCAD-ECAD co-design and provides faster, easier definition of stack-ups for rigid-flex rigid designs.

      - Inter design layer checks: The new inter layer functionality provides ability to check geometries between two different class/ subclasses for flex and rigid flex designs.

      - Arc routing - A new prototype feature to provide more efficient method to add routing during Add Connect by following an existing connect line or a route keep-in.

  • Cross section editor- Redesigned Cross Section Editor based on the spreadsheet technology found in Constraint Manager to provide one stop shop for features requiring cross section for their setup.
  • New padstack editor – Introducing modern user interface for convenient padstack creation with addition of new geometries and support for counter-bore/ counter-sink definitions and several new drill features.  (Watch Demo Video)
  • Shape Edit Application Mode –Introducing new functionality that is a fine tuning editing environment to increase efficiency with shape boundary editing and simplifying actions such as sliding a shape edge or adding a notch etc.
  • Color and Visibility enhancements – The Color Dialog box has been enhanced for better efficiency and ease of use for designers and the Visibility pane now provides access and control over layers other than the conductor layers.
  • 64 Bit Support – Now available support for 64 bit OS with increase in memory size from 4GB to 18 Quintillion and support for Database sizes upto 3GB.
  • More gains in performance for CPU intensive applications.
  • Display segment over voidsA new command Segment Over Voids detects cline segments crossing adjacent plane layer voids. (Watch Demo Video)
  • Spread Line between Voids New command to provide semi-automatic solution to spread channel based clines with respect to adjacent plane layer voids.
  • Via2Via Line Fattening- Users can increase line width between vias based on their definition of edge to edge clearance by using the “Line fattening” utility. (Watch Demo Video)
  • Contour routing- Now available in both single and mutli-routing modes, contour hugging locks the current route to either the route keepin or adjacent cline.
  • Group routing – User can now perform group routing by window selecting around a group of objects(Clines, Vias, Pins, Rats) and be able to change the control trace from its initial location to user defined and go into single trace mode to complete routes.
  • Gloss Commands – Richer set of gloss commands like Eliminate Vias, Convert corners to ARC, Fillet and Taper traces and many more now available in OrCAD PCB Designer.
  • Differential Pair Routing and DRC – Users can now define physical and electrical rules for Differential pairs complemented by routing support.
  • Layer Set DRC and Routing – The new layer set functionality insures layer constrained nets are routed to wiring requirements by ‘locking routes’ to within the appropriate layer set(s) for the net based objects. (Watch Demo Video)

OrCAD PSpice Designer - 17.2-2016

Please view the matrix to see which level the features appear in
Virtual Prototyping:  New functionality for automating the code generation for multilevel abstraction models written in C/C++, and SystemC, VerilogA-ADMS, and a set of behavioral analog  devices and controlled sources. (Watch Demo Video)

64 Bit Simulation Engine and Result Analysis – Leverage full potential of compute platform to perform simulation and waveform analysis on extremely large designs.  

  • New functions for Behavioral models – a set of Delay() functions to introduce delay in behavioral models or controlled sources.
  •  New Models – Models for TinySwitch-III family devices and new Optocoupler devices have been added
  • Support for TCL 8.6  - In 17.2 release Capture and PSpice support TCL 8.6.